发明名称 Methods for configuring FPGA's having variable grain components for providing time-shared access to interconnect resources
摘要 A Variable Grain Architecture (VGA) is used for synthesizing from primitive building elements (CBE's) an appropriate amount of dynamic multiplexing capability for each given task. Unused ones of such Configurable Building Elements (CBE's) are reconfigured to carry out further logic functions in place of the dynamic multiplexing functions. Each CBE may be programmably configured to provide no more than a 2-to-1 dynamic multiplexer (2:1 DyMUX). The dynamically-selectable output of such a synthesized 2:1 DyMUX may then be output onto a shared interconnect line. Pairs of CBE's may be synthetically combined to efficiently define 4:1 DyMUX's with each such 4:1 multiplexer occupying a Configurable Building Block (CBB) structure. Pairs of CBB's may be synthetically combined to efficiently define 8:1 DyMUX's with each such synthesized 8:1 multiplexer occupying a vertically or horizontally-extending leg portion of an L-shaped, VGB structure (Variable Grain Block). The so-configured leg portion of the VGB may then output the signal selected by its 8:1 DyMUX onto a shared interconnect line that is drivable by the VGB leg. Pairs or quartets of VGB's may be synthetically combined to efficiently define higher order, N:1 DyMUX's.
申请公布号 US6249144(B1) 申请公布日期 2001.06.19
申请号 US20000669186 申请日期 2000.09.25
申请人 VANTIS CORPORATION 发明人 AGRAWAL OM P.;SHARPE-GEISLER BRADLEY A.;CHANG HERMAN M.;NGUYEN BAI;TRAN GIAP H.
分类号 H03K19/173;H03K19/177;(IPC1-7):H03K19/177;G06F7/38 主分类号 H03K19/173
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