发明名称 |
Down conversion system using a pre-decimation filter |
摘要 |
An HDTV down conversion system including an apparatus for forming a low resolution video signal from an encoded video signal representing a video image. The encoded video signal is a frequency-domain transformed high resolution video signal with motion vectors. The apparatus includes a receiver for receiving the encoded video signal as a plurality of blocks of high resolution frequency-domain video coefficient values. A plurality of blocks comprises a macroblock. A down-conversion filter weights selected ones of the high resolution frequency-domain video coefficient values within each block to generate corresponding blocks of filtered frequency-domain video coefficients. An inverse-transform processor transforms each block of filtered frequency-domain video coefficients into a block of first-filtered pixel values. A pre-decimation filter performs inter-macroblock inter-block filtering of the plurality of blocks of first-filtered pixel values and provides corresponding blocks of second-filtered pixel values. A decimating processor deletes selected ones of the second-filtered pixel values within each block to provide blocks of low resolution video signal pixel values.
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申请公布号 |
US6249549(B1) |
申请公布日期 |
2001.06.19 |
申请号 |
US19980169790 |
申请日期 |
1998.10.09 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
KIM HEE-YONG |
分类号 |
H04N7/30;G06T3/40;G06T9/00;H04N7/015;H04N7/26;H04N7/50;(IPC1-7):H04B1/66 |
主分类号 |
H04N7/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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