| 摘要 |
PROBLEM TO BE SOLVED: To disperse the stress developed by the difference in thermal expansion coefficients between sealing resin, wirings and a circuit substrate by a method wherein a substrate terminal is formed on the mounting surface of the region located directly under a semiconductor device, a backside wiring is formed on the backside of the mounting surface and a conductive hole is formed on the circuit substrate located in the region directly under the semiconductor device. SOLUTION: The electrode pad 3 of an IC substrate chip 1 is electronically connected to the input/output terminal electrode 7 to be used as the substrate terminal formed on a two wiring layer substrates 11. A backside wiring layer 9 is formed on the backside of the mounting surface of the wiring layer substrates 11 where an input/output terminal electrode 7 and a surface wiring layer 8 are formed, and the input/output terminal electrode 7 and the surface wiring layer 8 are electrically connected to the backside wiring layer 9 through a conductive via hole 4 as a conductive hole. Accordingly, the malfunction such as breaking of wire, caused by the stress generated by the difference in thermal expansion coefficient of a circuit substrate, sealing resin and wirings, can be prevented. |
