METHOD FOR MANUFACTURING WAFER-LEVEL CHIP SCALE PACKAGE USING STENCIL PRINTING

摘要

PURPOSE: A method for manufacturing a wafer-level chip scale package(CSP) is provided to improve productivity, by more easily form a metal interconnection layer by a stencil printing process. CONSTITUTION: A semiconductor wafer includes a plurality of electrode pads(12) exposed between passivation layers(13) formed on a semiconductor substrate(11). The first insulating layer(14) is formed on the passivation layer. A stencil mask(16) having a predetermined pattern is formed on the first insulating layer to stencil-print a metal interconnection layer(17) electrically connected to the electrode pad. The metal interconnection layer is hardened. A partial region of the metal interconnection layer is exposed to form the second insulating layer on the metal interconnection layer and the first insulating layer. An external connection terminal is formed on the metal interconnection layer exposed between the second insulating layers.