| 摘要 |
PURPOSE: A level shifter circuit is provided to improve an integration and an operation speed of a device by performing a high level or low level shifting using one level shifter. CONSTITUTION: The circuit includes: the first inverter(31) inverting an input voltage to the first voltage or to the second voltage; the first NMOS transistor(32) whose source is connected to an output terminal of the first inverter and a gate is connected to the first voltage and a body is connected to the fourth voltage; the first PMOS transistor(33) whose source is connected to the output terminal of the first inverter and to the source of the first NMOS transistor and a gate is connected to the second voltage and a body is connected to the third voltage; the second PMOS transistor(34) whose drain is connected to a drain of the first NMOS transistor and a source and a body are connected to the third voltage; the second NMOS transistor(35) whose drain is connected to the drain of the first PMOS transistor and a source and a body are connected to the fourth voltage; the third PMOS transistor(36) whose drain is connected to a gate of the second PMOS transistor and a gate is connected to a common drain of the first NMOS transistor and the second PMOS transistor, and a source and a body are connected to the third voltage; and the third NMOS transistor(37) whose drain is connected to the gate of the second NMOS transistor and to the drain of the third PMOS transistor, and a gate is connected to a common drain of the first and the second PMOS transistor, and a source and a body are connected to the fourth voltage. And, an output value of the level shifter circuit is inverted and output to the external through the second inverter inverting an output of the common drain of the third PMOS transistor and the third NMOS transistor.
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