| 摘要 |
PURPOSE: A small outline dual in-line memory module(SODIMM) is provided to process data at high speed by preventing a skew phenomenon of data. CONSTITUTION: A SODIMM(100) comprises a plurality of synchronous graphic random access memories(SGRAM)(110¯140). The SGRAMs(110, 130) are constituted on the upper surface of a module. The SGRAMs(120, 140) are constituted on the lower surface of a module. The SODIMM(100) includes a phase synchronism loop circuit(150). The phase synchronism loop circuit(150) comprises an input frequency divider, a phase detecting device, a charge pump, a loop filter, a voltage control oscillator(VCO) and an output frequency divider. The phase synchronism loop circuit(150) synchronizes a phase of an input signal provided from the exterior with a phase of frequency-divided output signal and outputs the signal. The phase synchronism loop circuit(150) synchronizes a phase of a clock signal(CLK0) provided from the exterior with a phase of frequency-divided output signal and outputs internal clock signals(ICLK1, ICLK2, ICLK3, ICLK4) having the same frequency and phase. The clock signal(ICLK1) provided from the exterior is connected to a ground voltage(VSS) through a capacitor. The SGRAMs(110¯140) are operated by being synchronized to the corresponded clock signal out of the internal clock signals(ICLK1, ICLK2, ICLK3, ICLK4). The SGRAMs(110¯140) transmits/receives data(DQ) from the exterior through a data bus.
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