发明名称 |
RAMBUS DRAM |
摘要 |
PURPOSE: A RAMBUS DRAM is provided to reduce power consumption by enabling a clock signal('tclk') to output internal data to the external only under a read or a current control command, by judging in advance whether an applied command is the read command or the current control command. CONSTITUTION: The RAMBUS DRAM includes: a signal generation unit generating the first clock signal to output internal data to the external by an SCP(Secondary Control Packet) packet of a read command or a current control command; a signal preservation unit maintaining the first clock signal as it is; and a control unit stopping the first clock signal if the applied command signal is either the read command nor the current control command. The signal generation unit includes: a signal generation part(100) generating a 'tclk' signal by making a 'tclk_en' signal 'HIGH' when one of a 'idhit_cas_ff1' signal and a 'idhit_cas_othr' signal is 'HIGH' under the read command or the current control command; a signal preservation part(20) to maintain the enabled 'tclk_en' signal continuously in case of the read command or the current control command; a control part(30) disabling the enabled 'tclk_en' signal again if the applied command signal is either the read command nor the current control command; and a logic circuit part(NA3) generating a 'tclk_en' signal only under the read command or the current control command by receiving an output signal(ten_in1_b) of the control part as an input. |
申请公布号 |
KR20010048989(A) |
申请公布日期 |
2001.06.15 |
申请号 |
KR19990053896 |
申请日期 |
1999.11.30 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
BAEK, JONG SEOP;KOO, CHEOL HUI;KWAK, JONG TAE;PARK, NAK GYU;SHIN, DONG U |
分类号 |
G11C11/407;G06F1/32;G11C7/00;G11C7/22;G11C11/4076;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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