| 摘要 |
PURPOSE: A semiconductor memory device and a redundancy method thereof are provided to generate a shifting control signal dynamically to a column cycle in a multi bank structure, and to reduce the number of fuses. CONSTITUTION: Each of memory cell array blocks(BABLA,BABLB,BABLC,BABLD,BBBLA,BBBLB,BBBLC,BBBLD) of memory cell array banks(BA,BB) is enableld in response to block signals(BABLA,BABLB,BABLC,BABLD,BBBLA,BBBLB,BBBLC,BBBLD) respectively. Sense amplifiers(20-1,...,20-33) amplify data from each of data input/output line pairs. Data input drivers(22-1,...,22-33) drive input data and output it to the data input/output line pairs respectively. Switching circuits(24-1,...,24-32) output data from the corresponding sense amplifiers in response to shifting control signals(SH1,...,SH32) respectively, or output data from adjacent sense amplifiers(20-2,...,20-33), or output data to the corresponding data input drivers. Data output buffers(26-1,...,26-32) buffer data from each of the switching circuits to output it to the external. Data input buffers(28-1,...,28-32) buffer data from the external and output to the switching circuits respectively. Decoder and shifting control circuits(30-1,...,30-32) decode a redundant control signal(PSDQ) and a defective address(A0-A4) respectively, and generate shifting control signals in response to signals(PSH1,...,PSH32) from the former stage respectively. A defective cell setting circuit(32) sets the redundant control signal and the defective address in response to each selection signal.
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