| 摘要 |
PURPOSE: To obtain a drive circuit capable of avoiding an erroneous operation caused by a dv/dt transient signal even when the operating threshold voltage of an inverter becomes uneven. CONSTITUTION: The drain electrodes of DMOSes 2, 3 are respectively connected to inputs of inverters 6, 7 and inverters 22, 23. The outputs of the inverters 6, 7 are respectively connected to the inputs of NAND circuits 8, 9. The outputs of the NAND circuits 8, 9 are respectively connected to one inputs of NOR circuits 11, 12. As the inverters 22, 23, inverters having lower operating threshold voltages of the inverters 22, 23 and inverters having higher operating threshold voltages of operating threshold voltages of the inverters 6, 7 are adopted. The outputs of the inverters 22, 23 are connected to the one and another inputs of an AND circuit 10, and the output of the circuit 10 is connected to the another input of the circuits 11, 12.
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