DATA OUTPUT CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE CONTROLLING ACCESS TIME

摘要

PURPOSE: A data output circuit of a semiconductor memory device is provided to control access time and to prevent data error. CONSTITUTION: The circuit comprises: a sense amplification part(IOSA) which senses and amplifies an input signal(DIN) and outputs a sensing signal(DSA) and is enabled in response to a driving signal(IOSAE1); an output part(32) generating an output signal(DOUT) by receiving the sensing signal, in response to a transmission control signal(TRANSE1); and a driving signal generation part(34) generating the driving signal whose inactivation time is controlled, relating to the activation time of the transmission control signal. The circuit further comprises a latch part(36) latching the sensing signal. The driving signal generation part includes: a delay part(382) delaying the inactivation time of a spare driving signal(TRANSE); and a multiplexer(MUX1) selecting one of the spare driving signal and an output signal of the delay part and outputting it as the driving signal, in response to a delay control signal(DELE) controlling the activation time of the transmission control signal.