| 摘要 |
PURPOSE: A column redundancy circuit of a semiconductor memory device is provided, which comprises a column fuse box to prevent a mis-operation when repairing two arrays responding to the same address signal in one bank. CONSTITUTION: An address repair block generates an array redundancy signal(ARY_REDUNb) repairing an address selecting an array in response to a row precharge signal(XPCGb) and an array selection address signal(ARYSELADD<0:X>). A bit line repair block(620) generates a column redundancy signal(YREDUN) repairing a bit line address in response to the array redundancy signal and a column precharge signal(YPCGb) and the first and the second column address signal(YADD<0:1>) and the first and the second bank signal(BANK<0:1>). The bit line repair block comprises an input part(621) receiving the array redundancy signal and the column precharge signal, and an address input part(622) generates an output node N63 signal in response to the column address signals and the bank signals. The bit line repair block also comprises an output part(624) generating the column redundancy signal, and an output control part(623) controlling a current supply to the output part in response to the bank signals.
|
