| 摘要 |
A low noise oscillator operates by periodically opening a ring oscillator (102) to insert a reference input, thereby resetting any accumulated timing errors. The ring oscillator (102) may be placed within the PLL (100) to function as a voltage controlled oscillator. The loop in the ring oscillator is opened immediately prior to the arrival of the reference signal edge. While the ring oscillator loop is open, the reference signal is fed to the initial inverter (114) instead of the initial inverter of the ring oscillator receiving the output from the last inverter (118) of the ring oscillator. Shortly thereafter, the ring oscillator loop is closed again, and the structure operates as a conventional PLL with a ring oscillator until the next reset. The switching of the ring oscillator input is accomplished via a switch (104) operable between a ring setting (loop back ring oscillator output) and a reset setting (reference signal as input). Switching the input as described restarts the ring oscillator with zero timing error and resets any previously accumulated timing error, thereby reducing phase noise. In preferred embodiments, this reset methodology operates only when the PLL is in a locked mode and large corrections to the output of the oscillator are not required. By employing the ring oscillator control method, all the components of a phase-locked loop may be easily integrated into a single ASIC capable of producing very low phase noise signals. |
