| 摘要 |
<p>A flash memory cell is based on a floating gate transistor design in which a floating gate (16) is separated from a channel (14) by a tunnel oxide (15). The cell is programmed and erased by electrons tunnelling on and off the floating gate (16) through the tunnel oxide (15). To retain charge stored on the floating gate (16), the tunnel oxide (15) is relatively thick. As a result it takes a long time, of the order of 100 mu s, to program and erase the cell. Injection of charge onto the floating gate (16) is helped by hot-electron and channel inversion effects. However, no such effects help tunnelling of charge off the floating gate (16). Introduction of a silicon heterostructure hot-electron diode comprising an intrinsic silicon region (17a,17b) promotes electron transport from the floating gate (16) during erasing cycles and so reduces the erase voltage. Furthermore, the intrinsic silicon (17a,17b) region provides an additional barrier to charge leakage, so permitting a thinner tunnel oxide (15) to be used and thus read/write cycles become shorter. <IMAGE></p> |
