BANK BACKWARD COMPATIBILITY CIRCUIT

摘要

PURPOSE: A bank backward compatibility circuit is provided not to change a structure of an SDRAM for a compatibility by separating a bank signal for a row path from a bank signal for a column signal. CONSTITUTION: First and second D flip flops(DFF1,DFF2) receive external address signals(ADD(12),ADD(13)) and output them in synchronism with a synchronous signal. First through fourth NAND gates(NAD1-NAD4) NAND an output and an inverting output of the second D flip flop(DFF2) and output a bank address with respect to a row path through first through fourth inverters. Fifth through eighth NAND gates(NAD 5 -NAD8) NAND an output and an inverting output of the first D flip flop(DFF1) and output a bank address with respect to a column path through fifth through eighth inverters.