发明名称 |
Digital circuit with boundary scan cell with memory unit ensures that digital units can be tested without electrical access, with control and observation of signal connections |
摘要 |
The digital circuit has at least one boundary scan input cell (BSE) and at least one boundary scan output cell (BSA) with a memory unit (SP) between them that is connected to an output of a flip-flop unit (FFE) in the boundary scan input cell and an input of the boundary scan output cell. The memory unit is a shift register or memory cells of an SRAM.
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申请公布号 |
DE19937062(C1) |
申请公布日期 |
2001.06.13 |
申请号 |
DE19991037062 |
申请日期 |
1999.08.05 |
申请人 |
SIEMENS AG |
发明人 |
DIECKMANN, ANDREAS |
分类号 |
G11C29/00;G11C29/32;(IPC1-7):G01R31/318 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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