| 摘要 |
A highly-scalable parallel processing computer system architecture is described. The parallel processing system comprises a plurality of compute nodes for executing applications, a plurality of I/O nodes, each communicatively coupled to a plurality of storage resources, and an interconnect fabric providing communication between any of the compute nodes and any of the I/O nodes. The interconnect fabric comprises a network for connecting the compute nodes and the I/O nodes, the network comprising a plurality of switch nodes arranged into more than g(logbN) switch node stages, wherein b is a total number of switch node input/output ports, and g(x) indicates a ceiling function providing the smallest integer not less than the argument x, the switch node stages thereby providing a plurality of paths between any network input port and network output port.
|
