发明名称 SHIFT REGISTER AND ELECTRONIC DEVICE
摘要 PROBLEM TO BE SOLVED: To prevent malfunction caused by deficiency of discharge of electric charges by shifting an output signal to the poststage without attenuating a level of an output signal. SOLUTION: This device is constituted by connecting stages consisting of TFT 21-25, 31. The TFT 21 is turned on by a control signal of high level from a terminal Φ, and electric charges are accumulated in a capacitor A by inputting an output signal (high level) of preceding stage from a terminal IN. Thereby, the TFT 22, 24 are turned on and the TFT 25 is turned off, when a clock signal from a terminal clk is made a high level, it is outputted from a terminal OUT as an output signal of the stage. Next, when a clock signal is made a low level and a control signal is made a high level again, electric charges accumulated in the capacitor A are discharged through the TFT 21 the TFT 25 of the preceding stage. When electric charges of the capacitor A are made the prescribed quantity or less, as the TFT 24 is turned off, the TFT 31 is turned on. Thereby, electric charges accumulated in the capacitor A are discharged completely through the TFT 31.
申请公布号 JP2001160299(A) 申请公布日期 2001.06.12
申请号 JP19990342885 申请日期 1999.12.02
申请人 CASIO COMPUT CO LTD 发明人 MOROSAWA KATSUHIKO;KANBARA MINORU
分类号 G06F7/00;G09G3/20;G11C19/00;G11C19/28;H04N5/335;H04N5/369;H04N5/374 主分类号 G06F7/00
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