发明名称 Synchronous-rectified DC to DC converter with improved current sensing
摘要 A DC to DC buck pulse width modulator converter circuit includes an input, a high side output and a low side output. A high side switch is electrically connected between a common output node and a voltage supply, and controls a flow of current therethrough dependent upon the high side output. A low side switch is electrically connected between the common output node and ground, and controls a flow of current therethrough dependent upon the low side output. A virtual ground amplifier includes a second input electrically connected to ground. A current feedback resistor is electrically connected intermediate the common output node and a first input of the virtual ground amplifier. A variable impedance component is electrically connected to an output of the virtual ground amplifier and to the first input of the virtual ground amplifier. The impedance of the variable impedance component is varied dependent upon the output of the virtual ground amplifier. A sample and hold circuit is electrically connected intermediate the input of the pulse width modulator converter circuit and the variable impedance component. The sample and hold circuit sources a virtual ground current through the variable impedance component, and samples the virtual ground current.
申请公布号 US6246220(B1) 申请公布日期 2001.06.12
申请号 US20000633316 申请日期 2000.08.07
申请人 INTERSIL CORPORATION 发明人 ISHAM ROBERT H.;HAWKES CHARLES E.;WALTERS MICHAEL M.
分类号 G05F1/565;G05F1/613;H02M3/00;H02M3/158;H02M3/335;(IPC1-7):G05F1/613 主分类号 G05F1/565
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