发明名称 |
Intra-unit column address increment system for memory |
摘要 |
A system and method is disclosed herein for providing column address increment pipelining within a single physically contiguous storage array, such as a left or a right unit of a double unit. Thereby, a multiple bank arrangement is provided within a double unit which permits column address increment pipelining to be performed within each bank thereof.
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申请公布号 |
US6246630(B1) |
申请公布日期 |
2001.06.12 |
申请号 |
US19980017011 |
申请日期 |
1998.02.02 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HOSOKAWA KOHJI;KIRIHATA TOSHIAKI |
分类号 |
G11C11/407;G11C8/10;G11C11/401;(IPC1-7):G11C8/00 |
主分类号 |
G11C11/407 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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