FAILURE ANALYZING METHOD, ITS SYSTEM, YIELD RATIO COMPONENT SIMULATION METHOD AND VIRTUAL YIELD RATIO CALCULATING METHOD

摘要

PROBLEM TO BE SOLVED: To provide a system which efficiently performs a failure analysis for a proper product ratio (yield ratio) for a semiconductor chip manufacture by causes. SOLUTION: A chip arrangement on a wafer which is defined at a chip arrangement defining part 5 is decided at a grouping pattern defining part how to group each adjacent chip, and a virtual category map for failure occurrence is generated at a simulation part. Two kinds of yield ratio component which are failures of being randomly generated on the wafer caused by contamination and of being continuously generated caused by a process are calculated at a yield ratio component separating part, by a mathematical logic base by (n) times of an original chip area which integrates each adjacent (n) chips and by a yield ratio of the category map.