发明名称 COMPARATOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a comparator circuit that keeps a delay time from an input to an output constant independently of an input level and a slew rate. SOLUTION: A 1st waveform shaping section 12 converts an inverted output of a differential amplifier 30 into a binary signal, a 1st variable delay section 14 using an output of the 1st waveform shaping section 12 for a trigger detects a current flowing through a load resistor at a noninverted output side of the differential amplifier 30 to change a delay and provides an output of a signal to an input of a flip-flop 2. Similarly, a 2nd waveform shaping section 22 converts a noninverted output of the differential amplifier 30 into a binary signal, and a 2nd variable delay section 24 using an output of the 2nd waveform shaping section 22 for a trigger detects a current flowing through a load resistor at an inverted output side of the differential amplifier 30 to change a delay and provides an output of a signal to the other input of the flip-flop 2. The flip-flop 2 shifts its output to a specific state depending on timing of the received signal.
申请公布号 JP2001156603(A) 申请公布日期 2001.06.08
申请号 JP19990340269 申请日期 1999.11.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 WATANABE SEIJI;ENOI TAKAHIRO;TAKADA HARUHISA;NISHIKAWA KAZUHIKO
分类号 G01R19/165;H03K5/08;(IPC1-7):H03K5/08 主分类号 G01R19/165
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