发明名称 |
SERIAL DATA TRANSFER SYSTEM |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide a serial data transfer system which can automatically check the transfer of data via an ASIC with no use of a CPU and also with the signal direction kept as it is, can automatically detect the rate of data and also can improve the transfer reliability of serial data after a test mode is canceled. SOLUTION: A processing circuit provided at the test data transmitting side transmits the logics of a start bit and a 1st bit of test data after inverting them. A processing circuit provided at the test data receiving side includes a 1st edge detection means which detects the start edge of a start bit of test data and a 2nd gate detection means which detects the end edge of the start bit. A start bit length time measuring means 12a detects the start bit length via the 1st and 2nd edge detection means.</p> |
申请公布号 |
JP2001156875(A) |
申请公布日期 |
2001.06.08 |
申请号 |
JP19990334522 |
申请日期 |
1999.11.25 |
申请人 |
KONICA CORP |
发明人 |
TAKACHI HAJIME;TAKAGI MUTSUMI |
分类号 |
H04L29/08;H04L7/04;(IPC1-7):H04L29/08 |
主分类号 |
H04L29/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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