| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for simulating the number of instruction execution clocks for estimating the executing time of a program with an error which is negligible in practice while maintaining the simulation speed of an instruction set simulator. SOLUTION: While an instruction storage state is maintained and the number of execution clocks uniquely decided according to the present instruction storage state and an instruction and the next instruction storage state are successively obtained, the total sum of the number of execution clocks is calculated. The instruction storage state is obtained as the state of the number of instructions held in an instruction prefetch buffer for holding instructions preliminarily fetched prior to the decoding of the instruction, and takes a finite number of states decided by the structure of a processor. The decided number of execution clocks includes a parameter including the number of clocks in the bus cycle of load and store and the number of clocks in the bus cycle of instruction fetch, and the parameter is decided according to the bit width of the bus and the number of wait of the memory.
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