发明名称 METHOD AND DEVICE FOR CONTROLLING MULTIPROCESSOR TASK
摘要 PROBLEM TO BE SOLVED: To prevent the competition of buses between processors even when each of processors accesses a kernel and the task information of an execution task. SOLUTION: The bus configuration of a system is made into two stages of a local bus 15 and a global bus 16, two kinds of memories of private memory 11 accessible only for a present processor and a shared memory 12 commonly accessible even from the other processors are loaded on the local bus 15 of each of processors 1-3, a kernel part is loaded in the private memory 11 and a task information part is loaded in the shared memory 12. Thus, even when each of processors 1-3 accesses the kernel and the task information of the execution task, the competition of buses between processors can be prevented. Further, by performing task scheduling while referring to a data transfer time table, the data transfer time of task information between processors can be shortened.
申请公布号 JP2001155001(A) 申请公布日期 2001.06.08
申请号 JP19990341151 申请日期 1999.11.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MORIHISA KENJIRO
分类号 G06F15/177;G06F9/46;G06F15/167;(IPC1-7):G06F15/177 主分类号 G06F15/177
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