| 摘要 |
PROBLEM TO BE SOLVED: To solve a problem of a conventional phase locked loop device that cannot ensure the tracking performance when the stability of phase locking with an external clock is too much emphasized. SOLUTION: This phase locked loop device is provided with a 1st phase comparator 11 that compares a phase of an external clock 100 with a phase of a frequency division clock 203 to detect a 1st phase difference, a phase correction counter 12 that counts a synchronous count from the 1st phase difference based on an in-device clock 200, a phase correction frequency divider 13 that frequency-divides the in-device clock 200 based on the synchronous count to generate a corrected frequency division clock 201, a 2nd phase comparator 21 that compares a phase of the corrected frequency division clock 201 with a frequency division clock 202 of the in-device clock 200 to detect a 2nd phase difference, and a VCO 23 that generates the in-device clock 200 based on the 2nd phase difference. |
