发明名称 JOINTING METHOD OF SILICON WAFERS
摘要 PROBLEM TO BE SOLVED: To provide a jointing method of silicon wafers, which pauses no risk of flaking at jointing interfaces, by reducing voids when silicon substrates are jointed. SOLUTION: When a first silicon substrate 1 having circuit element 3 formed thereon and a second silicon substrate 11 as a base stage are jointed, a diffusion preventive layer 4 for preventing diffusion of Au is formed on the first silicon substrate 1. An Au layer 5 is formed thereon, a diffusion preventive layer 4 for preventing diffusion of Au is formed on the second silicon substrate 11, and a polysilicon layer 14 is formed thereon. The Au layer 5 of the first silicon substrate 1 and the polysilicon layer 14 of the second silicon layer 11 are overlapped, and a prescribed load is applied thereto, at a temperature of Au-Si eutectic temperature or higher to joint the silicon substrates 1 and 11. The diffusion layer is made of a metal thin film, silicon oxide film, silicon nitride film, SiC layer, alumina layer, boron layer or Au-rich layer.
申请公布号 JP2001155976(A) 申请公布日期 2001.06.08
申请号 JP19990335479 申请日期 1999.11.26
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 SAITO HIROSHI;AKAI SUMIO;KATAOKA KAZUSHI
分类号 H01L21/52;H01L21/02;H01L29/84;H01L41/08;(IPC1-7):H01L21/02 主分类号 H01L21/52
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