| 摘要 |
PROBLEM TO BE SOLVED: To realize a slew rate controller that is hardly susceptible to the effect of noise and stabilizes the slew rate. SOLUTION: An AND circuit 322 ANDs a pulse signal from a pulse generating circuit 320 and a clock signal from a PLL circuit 321 and provides an output of an AND signal, and a frequency divider circuit 323 receives the AND signal and generates frequency divider circuit output signals with different frequencies. Exclusive OR circuits 324-326 generate control signals from the frequency divider circuit output signals and a data signal. Furthermore, an impedance control circuit 20 generates a control signal. The various control signals are used to control output buffers 1-13. The outputs from the control output buffers 1-13 are given to an output terminal 15 and to a termination resistor 16. A termination voltage 17 is applied to a termination resistor 16.
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