发明名称 SEMICONDUCTOR DEVICE
摘要 As a technique for leading out data lines from a sub-memory array (SMA) to sense amplifiers (SA) when the sense amplifiers are arranged alternately, adjacent two data lines in the sub-memory array or two data lines sandwiching adjacent two data lines are connected to adjacent two sense amplifiers. More specifically, an even number (0, 2, 4, ...) of data lines are sandwiched between the data lines connected to two adjacent sense amplifiers. Thus disconnection and short circuit at the connection of a sense amplifier block and the sub-memory array are avoided, and the layout is facilitated.
申请公布号 WO0141211(A1) 申请公布日期 2001.06.07
申请号 WO2000JP08424 申请日期 2000.11.29
申请人 HITACHI, LTD.;TAKEMURA, RIICHIRO;SEKIGUCHI, TOMONORI;KIMURA, KATSUTAKA;KAJIGAYA, KAZUHIKO;TAKAHASHI, TSUGIO 发明人 TAKEMURA, RIICHIRO;SEKIGUCHI, TOMONORI;KIMURA, KATSUTAKA;KAJIGAYA, KAZUHIKO;TAKAHASHI, TSUGIO
分类号 G11C11/4097;H01L21/8242;H01L27/108;(IPC1-7):H01L21/824;G11C11/401 主分类号 G11C11/4097
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