发明名称 |
Dynamic logic entry latch for microprocessor, evaluates clock signal type and generates pulse for driving logic circuit to produce dynamic output signal |
摘要 |
A logic circuit has a first input for a first static input signal and clock signal. The logic circuit includes a pulse generator which evaluates the static input signal and the clock-signal-type input-signal and produces a first pulse, which causes the logic circuit to produce a first dynamic output signal at a first output terminal. An Independent claim is also included for an input method for static input signal.
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申请公布号 |
DE10034906(A1) |
申请公布日期 |
2001.06.07 |
申请号 |
DE20001034906 |
申请日期 |
2000.07.18 |
申请人 |
HEWLETT-PACKARD CO. (N.D.GES.D.STAATES DELAWARE), PALO ALTO |
发明人 |
FETZER, ERIC S.;BENJAMIN, GARY J. |
分类号 |
H03K3/356;H03K5/135;(IPC1-7):H03K3/353;G06F1/04 |
主分类号 |
H03K3/356 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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