发明名称 Potential change suppressing circuit
摘要 To a first node at a boosted potential, a control circuit is connected for controlling a potential of the first node so that the potential of the first node does not exceed a predetermined potential, wherein the control circuit has a capacitor connected between the first node and a second node, a first switching transistor having a source-drain current path inserted between the second node and the ground node and a gate to which a control signal is input, and a second switching transistor having a source-drain current path inserted between the first node and the ground node, and a gate connected to the second node.
申请公布号 US2001002800(A1) 申请公布日期 2001.06.07
申请号 US20000725726 申请日期 2000.11.30
申请人 IMAMIYA KENICHI 发明人 IMAMIYA KENICHI
分类号 G11C11/407;G11C5/14;G11C16/06;G11C16/08;H03K17/00;(IPC1-7):H03L5/00 主分类号 G11C11/407
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