发明名称 |
Data processing apparatus and method of controlling the same |
摘要 |
<p>A data processing apparatus that can perform high-speed interrupt processing, and a method of controlling such a data processing apparatus are provided. This data processing apparatus includes: an execution unit that executes an instruction read out from a memory; a general register connected to the execution unit; a shadow register also connected to the execution unit; and selectors that allocate to the shadow register a part or the entire part of an address already allocated to the general register when an interrupt is executed in accordance with the instruction. <IMAGE></p> |
申请公布号 |
EP1104899(A2) |
申请公布日期 |
2001.06.06 |
申请号 |
EP20000308521 |
申请日期 |
2000.09.28 |
申请人 |
FUJITSU LIMITED |
发明人 |
MIYAKE, HIDEO;SUGA, ATSUHIRO;NAKAMURA, YASUKI;TAKEBE, YOSHIMASA |
分类号 |
G06F9/46;G06F9/48;(IPC1-7):G06F9/46 |
主分类号 |
G06F9/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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