| 摘要 |
<p>The invention concerns a method for providing on a digital data transmission line (10) a synchronous communication, in particular using an asynchronous communication processor (1). The method comprises the following steps: connecting at least one clock wire (TC, RC) of the line (10) to a first input control (DCD) of the processor, connecting a data reception wire (TD) to a second control input (DSR) of the processor, connecting a data transmission wire (RD) to an output control (DTR) of the processor, and in synchronisation with an interrupting signal (IT) delivered by the processor (1) with each variation of the logical status of the first input control (DCD), reading bit by bit on the second input control (DSR) the data to be received or writing bit by bit on the output control (DTR) the data to be transmitted. The invention is particularly useful for microcomputers which are not provided with a synchronous communication processors.</p> |
