发明名称 Apparatus and method for parallelizing legacy computer code
摘要 A computer-implemented method and apparatus for parallelizing input computer-program code based on class-specific abstractions. The method includes the steps of providing a class-specific abstraction (CSA), and generating parallelization code based on the CSA and the input code. Other aspects include checking the input code for compliance with the CSA, performing a dependency analysis of the input code for compliance with the CSA, analyzing the control flow of the input code based on the CSA, and generating a block-based representation of a control flow based on index variables in the input code and on the CSA. In one embodiment, the CSA includes a computational-set template, a dependency template, and a set of allowed index-variable access patterns. Yet other aspects include generating synchronization points based on the CSA, mapping a computational set to a virtual array of parallel processors, and mapping the virtual array of parallel processors to a physical array of parallel processors. Other features include outputting a representation of communications flow between processors of data related to index variables in the input code. Other aspects include a storage medium having a computer program stored thereon for causing a computer to parallelize input code by the method. Another embodiment includes the steps of identifying to the computer a numerical-method class used in the input code, identifying a mapping of an index variable used in the input code to spatial coordinates. Other aspects include performing dependency analysis to determine communication-synchronization points, and minimizing the number of such points for data transmitted between processors.
申请公布号 US6243863(B1) 申请公布日期 2001.06.05
申请号 US19990366058 申请日期 1999.08.02
申请人 IOWA STATE UNIVERSITY RESEARCH FOUNDATION, INC. 发明人 KOTHARI SURAJ C.;SIMANTA MITRA;KIM YOUNGTAE
分类号 G06F9/45;(IPC1-7):G06F9/45 主分类号 G06F9/45
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