METHOD FOR GENERATING TARGET BRANCH ADDRESS OF INSTRUCTION CACHE MEMORY FOR N-WAY SUPER SCALAR CPU

摘要

PURPOSE: A target branch address generation method is provided to detect a definite position of a target branch address in cache lines and instruction groups, and to fetch n continuous instructions irrespective of the instruction groups so that it can take an advantage of a pipeline structure when executing a branch instruction. CONSTITUTION: The method comprises steps of storing a cache line data, an instruction group data and an instruction data as a target branch address, detecting if the instruction to be addressed by the target branch address belongs to the final instruction group of a cache line, designating the start address of the final instruction group as the target branch address in the case that the instruction to be addressed by the target branch address belongs to the final instruction group of a cache line, and designating the target branch address as a start address and fetching n continuous instructions in the case that the instruction to be addressed by the target branch address does not belong to the final instruction group of a cache line.