发明名称 Method and apparatus for netlist filtering and cell placement
摘要 Integrated circuit chip (IC) design and fabrication is a complex process requiring many stages including elaborate cell placement processes. The present invention provides a method and apparatus to facilitate the placement of cells on the surface of an integrated circuit device. Specifically, the invention involves placement of one type of cells (such as logic cells, I/O cells or scan cells) apart from other types of cells. The present invention facilitates the placement of such cells by first parsing the netlist to remove all cells other than the specific type of cells that are to be placed.
申请公布号 US6243849(B1) 申请公布日期 2001.06.05
申请号 US19980042230 申请日期 1998.03.13
申请人 LSI LOGIC CORPORATION 发明人 SINGH VIRINDER;LIANG MIKE
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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