发明名称 |
TRENCH ISOLATION METHOD FOR SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A trench isolation method for a semiconductor device is provided to prevent a dent phenomenon and a grooving phenomenon, by forming a liner by using a silicon oxynitride layer having an etch rate different from that of a silicon nitride layer functioning as an etch stopper. CONSTITUTION: A pad oxide layer(102) and a silicon nitride layer are formed on a semiconductor substrate(100). A predetermined depth of the silicon nitride layer, the pad oxide layer and the semiconductor substrate is etched to form a trench(106) for isolation. A liner(110) composed of a layer having an etch rate different from that of the silicon nitride layer is formed on the resultant structure having the trench. After an oxide layer is formed on the entire surface of the resultant structure having the liner, a planarization process is performed until the silicon nitride layer is exposed. A phosphoric acid process is performed to eliminate the exposed silicon nitride layer.
|
申请公布号 |
KR20010045622(A) |
申请公布日期 |
2001.06.05 |
申请号 |
KR19990048963 |
申请日期 |
1999.11.05 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
BOO, JAE PIL |
分类号 |
H01L21/76;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/76 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|