| 摘要 |
A multivalued mask ROM is configured by arranging cell transistors in a matrix form, which is defined by wiring word lines and ground lines in rows and by wiring bit lines in columns. Each of the cell transistors is encompassed by a word line, a ground line and at least two bit lines. Herein, gates of the cell transistors which align in a same row are connected with a same word line, while sources and drains of the cell transistors are adequately connected or disconnected with the ground line and bit lines. In an integrated circuit, contacts are formed between n+ regions, first-layer metal and second-layer metal on a well region to establish connections by which the source and drain of the cell transistor are adequately connected with the ground line and/or bit lines. That is, ROM codes are formed using the contacts. A circuitry is provided for the multivalued mask ROM to read out stored information of the cell transistors in synchronization with a clock signal. In Low-level duration of the clock signal, the circuitry performs precharge to a first bit line and pull-down to a second bit line. In High-level duration of the clock signal, the circuitry stops the precharge and pull-down while activating the word line to detect levels of the first and second lines, which are used as values for a two-bit code corresponding to stored information of the cell transistor.
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