| 摘要 |
PURPOSE: A method for manufacturing a memory device is provided to prevent an attack phenomenon by improving a contact characteristic between a node contact and a lower electrode of a capacitor. CONSTITUTION: The first interlayer dielectric(22) is deposited on a semiconductor substrate(21) having a device, and a poly plug(23) connected to a specific portion of the device is formed. A bit line conductive layer(24) is deposited on the entire surface of the poly plug, and patterned to form a bit line. The second interlayer dielectric(25) is deposited on the entire structure, and patterned to form a nitride layer(26) and the first oxide layer, sequentially. The first polysilicon layer is deposited, and etched to pattern a region where the poly plug is formed. The first oxide layer, the nitride layer and the second interlayer dielectric are tilt-etched to form a node contact hole by using the patterned poly plug as a hard mask. A polysilicon layer is formed on the entire structure, and planarized to expose the first oxide layer and to form a node contact(29). The second oxide layer is deposited on the resultant structure. The second oxide layer and the first oxide layer are sequentially etched to correspond to a position for a capacitor so that a node contact is exposed. The second polysilicon layer(31) is formed on the resultant structure. An insulating layer is deposited on the second polysilicon layer and etched back. The exposed second polysilcion layer is etched, and the remaining insulating layer and oxide layer are eliminated.
|
