NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH CAN REDUCE READ TIME

摘要

PURPOSE: A nonvolatile semiconductor memory device is provided to reduce a read time to improve an operation speed by discharging node voltage to required voltage quickly . CONSTITUTION: The nonvolatile semiconductor memory device includes: an array(10) of memory cells arranged in cross regions of word lines and bit lines(BL0-BL1023); a plurality of load transistors(41) which are connected to the bit lines respectively and supply a load current to the corresponding bit lines during a read operation; and a load control circuit(100) controlling a voltage to be applied to a node(A0) where gates of the load transistors are connected in common, during the read operation. The load control circuit includes: the first discharge part(120) discharging a voltage of the node in response to a sense activation signal during the read operation; a target voltage generation part(160) generating a target voltage to be set to the node in response to the sense activation signal; a comparison part(180) generating a comparison signal by detecting whether the voltage of the node is higher than the target voltage; and the second discharge part(140) discharging the voltage of the node in response to the comparison part. Each memory cell includes an electrically erasable programmable read only memory(EEPROM) cell transistor.