发明名称 System for register partitioning in multi-tasking host adapters by assigning a register set and a unique identifier in each of a plurality of hardware modules
摘要 An integrated circuit includes a sequencer module that executes firmware command lines and a plurality of hardware I/O bus interface modules. The plurality of hardware modules operates independently, and performs operations specified in a hardware I/O control block. Each of the plurality of hardware modules and receive data from and/or transmit data to an I/O bus. The sequencer module configures each hardware module by initializing a register set in each module, and monitors the operation of each module by polling the hardware register set. Each hardware module has a unique module identifier. Each register set has the same logical address space. A physical address of a particular register is the combination of the module identifier and the logical address of the register. Registers in two or more register sets that are used for the same operation, or function have the same logical address. This permits a single firmware routine to be used to service these modules for that function or operation. This reduces the number of command lines that are required
申请公布号 US6243767(B1) 申请公布日期 2001.06.05
申请号 US19980089013 申请日期 1998.06.02
申请人 ADAPTEC, INC. 发明人 YOUNG B. ARLEN
分类号 G06F12/06;(IPC1-7):G06F12/06 主分类号 G06F12/06
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