| 摘要 |
A method of fabricating a semiconductor device or a substrate having a cell region and a peripheral region includes the step of selectively forming a trench between the cell region and the peripheral region, and forming an isolation layer in the trench. Next, a plurality of gate electrodes are formed on the semiconductor substrate. Lightly doped regions are formed in the semiconductor substrate using the gate electrodes as a mask. Spacers are formed on sides of each of the gate electrodes. A first insulating layer is formed on the cell region of the semiconductor device such that surfaces of the gate electrodes on the cell region remain exposed. A conductivity of the peripheral region of the semiconductor substrate is altered using the first insulating layer, the gate electrodes and the spacers as a mask. Silicide layers are formed on the peripheral region of the substrate and the gate electrodes. A planarization layer is formed on the overall surface of the device, including the silicide layer, and contact holes are formed to expose portions of the cell and peripheral regions of the substrate. Finally, a plurality of bit lines are formed on the second insulating layer, the bit lines extending into the contact holes.
|
