摘要 |
A method and apparatus for eliminating defects present in memory devices by way of a defect management engine (DME) is described. The DME integrates a plurality of defective address cells and redundancy address cells within an array. The defective address cells store addresses for accessing defective cells in a main memory. The redundancy address cells store addresses for accessing redundancy cells within a redundancy memory. The address data in the defective address cells is compared to the address input of the DME, thereby providing a redundancy match detection scheme. When no match occurs, the DME outputs the address input of the DME, which allows the main memory to be accessed when operating in a normal mode. When a match occurs, the DME outputs the address read from the redundancy address cells, which allows the redundancy memory to be accessed when operating in a redundancy mode.
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