发明名称 ACCESSING MULTIPLE MEMORIES USING ADDRESS CONVERSION AMONG MULTIPLE ADDRESSES
摘要 A memory device including a first memory and a second memory. A first processor generates a first address for defining a location to be accessed in the first memory and a second address for defining a location to be accessed in the second memory. A second processor generates a third address. A memory control section controls access to the first memory and access to the second memory. The memory control section includes an address conversion section for converting the third address so as to represent either one of the first address and the second address.
申请公布号 US2001002482(A1) 申请公布日期 2001.05.31
申请号 US19970812711 申请日期 1997.03.06
申请人 OKAMOTO MINORU 发明人 OKAMOTO MINORU
分类号 G06F12/06;(IPC1-7):G06F12/00 主分类号 G06F12/06
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