发明名称 |
Read and refresh control method for DRAM memory used in a microcontroller system, involves periodic refreshing of DRAM during specified wait periods of CPU |
摘要 |
The micro controller (1) has a dynamic random access memory DRAM (3) that is coupled to a CPU (2) and a DRAM controller (4). The state of the DRAM memory is refreshed periodically during the specified wait periods of the CPU.
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申请公布号 |
DE19956240(A1) |
申请公布日期 |
2001.05.31 |
申请号 |
DE19991056240 |
申请日期 |
1999.11.23 |
申请人 |
ROBERT BOSCH GMBH |
发明人 |
AUE, AXEL |
分类号 |
G06F15/78;G11C7/10;G11C11/406;(IPC1-7):G06F12/00 |
主分类号 |
G06F15/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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