发明名称 DATA PROCESSING METHOD USING MICROPROCESSOR HAVING IMPROVED MEMORY MANAGEMENT UNIT AND CACHE MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To provide a technique for easily realizing scaling so that a microprocessor can be matched with the development of a microprocessor in the following generations. SOLUTION: An MMU 110 is offered in a further easily scalable system so that the MMU can be matched with the development of a processor 100 in the following generations. It is desired that the MMU resource is accessed in a constituting register space separated from physical and logical address spaces, and the MMU constituting register is embodied so as to be matched with a version to be easily scaled further. Then, an instruction to perform access to the MMU constituting register contents, and to change and control them is offered.</p>
申请公布号 JP2001147857(A) 申请公布日期 2001.05.29
申请号 JP20000280065 申请日期 2000.09.14
申请人 HITACHI LTD 发明人 YOSHIOKA SHINICHI;DAVID SHAFFERD;RAJESH CHOPRA
分类号 G06F12/08;G06F12/10;G06F15/78;(IPC1-7):G06F12/08 主分类号 G06F12/08
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