发明名称 Method of simultaneous fabrication of isolation and gate regions in a semiconductor device
摘要 A method of forming a semiconductor device includes forming a moat stack outwardly from a substrate, the moat stack comprising a dielectric pad disposed outwardly from the substrate, a silicon buffer structure disposed outwardly from the dielectric pad, and a protective dielectric cap disposed outwardly from the silicon buffer structure. The method further comprises forming a protective sidewall structure outwardly from at least a sidewall of the silicon buffer structure, forming an isolation dielectric region adjacent to the moat stack, after formation of the isolation dielectric region, removing the protective dielectric cap, and forming a conductive gate comprising the silicon buffer structure.
申请公布号 US6239003(B1) 申请公布日期 2001.05.29
申请号 US19990334786 申请日期 1999.06.16
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 RAO KALIPATNAM V.;GULDI RICHARD L.;CHEN KUEING-LONG
分类号 H01L21/762;H01L21/8234;(IPC1-7):H01L21/76 主分类号 H01L21/762
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