SEMICONDUCTOR INTEGRATED CIRCUIT

摘要

PROBLEM TO BE SOLVED: To prevent the characteristic deterioration of a P-channel FET in the power consumption reduction mode of a semiconductor integrated circuit. SOLUTION: The power source of a digital circuit part is interrupted for reducing power consumption and the output voltage of the power source is made to be zero. A CMOS inverter 10 manufactured by a dual gate process in the digital circuit part has a P-channel FET 11 having a gate electrode formed of P-type polysilicon. The source electrode of the P-channel FET 11 is connected to the power source and the back gate electrode of the P-channel FET 11 is connected to the source electrode. When the power source is interrupted in a power consumption reduction mode, the P-channel FET 11 does not function as a transistor. A pull-down switch 24 for fixing the voltage of the gate electrode of the P-channel FET 11 to zero in the mode is provided so that the characteristic deterioration of the P-channel FET 11 is prevented in the same mode.