发明名称 DEVICE AND METHOD FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To conduct a selection test of a test of a very-multiple-terminal LSI by an LSI tester which has a small number of terminals without incorporating a circuit dedicated to the test in the tested LSI. SOLUTION: This device is equipped with a test control means which outputs test control data TCD including settings of input/output modes of the tested LSI 32 by test patterns and a test interface board 3 is equipped with an LSI 31 for test control which supplies test patterns and input answer patterns by switching connections with respective terminals of the tested LSI 32 by an LSI tester 2 according to connection patterns for test implementation set under the control of a test control signal TC corresponding to the test control data TCD.
申请公布号 JP2001147254(A) 申请公布日期 2001.05.29
申请号 JP19990330195 申请日期 1999.11.19
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 SATO MASAAKI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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