Content addressable memory protection circuit and method

摘要

A content addressable memory (CAM) protection circuit includes a memory cell having a read terminal for reading contents of the memory cell; a pass transistor coupled to the read terminal; and a latch having a first inverter with an input terminal and an output terminal coupled to the read terminal by the pass transistor and a second inverter with input and output terminals respectively coupled to the output and input terminals of the first inverter. The first inverter includes a pull-down transistor coupled between the output terminal of the first inverter and a first voltage reference and having a control terminal coupled to the input terminal of the latch and a pull-up transistor coupled between the output terminal of the first inverter and a second voltage reference and having a control terminal coupled to the input terminal of the latch. Unlike prior art designs, the first inverter further includes a bias transistor coupled with the pull-up transistor between the output terminal and the second voltage reference. Preferably, the CAM protection circuit further includes a bias circuit coupled to a control terminal of the bias transistor wherein the bias circuit includes a first current mirror leg coupled between the first and second voltage references and having a control node coupled to the control terminal of the bias transistor, thereby forming a current mirror with the bias transistor and pull-up transistor being part of a second mirror leg of the current mirror.