发明名称 Interconnect structure using a combination of hard dielectric and polymer as interlayer dielectrics
摘要 A structure and method of fabrication of a semiconductor integrated circuit is described. A first patterned electrically conductive layer contains a low dielectric constant first insulating material such as organic polymer within the trenches of the pattern. A second insulating material such as a silicon dioxide or other insulating material having a greater. mechanical strength and thermal conductivity and a higher dielectric constant than the first insulating material is formed over the first patterned electrically conductive layer Vias within the second insulating material filled with electrically conductive plugs and a second patterned electrically conductive layer may be formed on the second insulating material. The structure can be repeated as many times as needed to form a completed integrated circuit.
申请公布号 US6239019(B1) 申请公布日期 2001.05.29
申请号 US19990291401 申请日期 1999.04.13
申请人 INTEL CORPORATION 发明人 CHIANG CHIEN;FRASER DAVID B.
分类号 H01L23/522;H01L23/532;(IPC1-7):H01L21/476 主分类号 H01L23/522
代理机构 代理人
主权项
地址